Periodically Time-Varying Realizations of Multirate Converters for Hardware Reduction
| Paper File | Download Paper File | | Appear In | ECTI Transaction EEC (ECTI Transaction EEC) | | Publication Date | 01/08/2004 - 28/08/2004 | | Volume | 2 | | Pages | 54 - 63 | | No | 2 | | Author 1 | Sachin Ghanekar | | Author 2 | Sawasd Tantaratana |
Abstract
Realizations of multirate FIR filters are proposed
using periodically time-varying (PTV) structures. By
exploiting the computational redundancy of the filtering
operation in a multirate filter, it is possible to
implement the filter with much less hardware. In the
proposed implementations, the number of multiplyand-
add units is reduced by making several coefficients
share one multiplier-and-add unit in a periodic
fashion. Specifically, each multiply-and-add unit performs
different coefficient scalings at different time instants
within a period. Compared to the direct form
realization, the proposed realizations reduce the hardware
of an interpolator and a decimator by a factor of
approximately U and M, respectively, while retaining
the same processing speed, where U and M are the
upsampling and downsampling factors, respectively.
For a rational sampling rate conversion by a factor
of U/M, where U and M are relatively prime, the
proposed realization offers hardware reduction by a
factor of approximately UM, compared to the conventional
direct form. |
